Preface to the Fifth Edition xl Chapter 1. Introduction to PLLs 1.1 Operating Prlciples of the PLL 1.2 Classification of PLL Types Chapter 2. Mixed-Signal PLLs 2.1 Block Diagram of the Mixed-Signal PLL 2.2 A Note on Phase Signals 2.3 Building Blocks of Mixed-Signal PLLs 2.3.1 Phase Detectors 2.3.2 Loop Filters (First Order) 2.3.3 Controlled Oscillators 2.3.4 Down-Scalers 2.4 PLL Performance in the Locked State 2.4.1 Mathematical Model for the Locked State 2.4.2 Definition of Transfer Functions 2.4.3 Transient Response of the PLL in the Locked State 2.4.4 Steady-State Error of the PLL 2.5 The Order of the PLL System 2.5.1 Number of Poles 2.5.2 A Special Case: The First-Order PLL 2.6 PLL Performance in the Unlocked State 2.6.1 Mathematical Model for the Unlocked State 2.6.2 Key Parameters of the PLL 2.7 Phase Detectors with Charge Pump Output 2.8 PLL Performance in the Presence of Noise 2.8.1 Sources and Types of Noise in a PLL 2.8.2 Defining Noise Parameters 2.8.3 The Impact of Noise on PLL Performance 2.8.4 Pull-in Techniques for Noisy Signals 2.9 Design Procedure for Mixed-Signal PLLs 2.10 Mixed-Signal PLL Applications 2.10.1 Retiming and Clock Signal Recovery 2.10.2 Motor-Speed Control Chapter 3. PLL Frequency Synthesizers 3.1 Synthesizers in Wireless and RF Applications 3.2 PLL Synthesizer Fundamentals 3.2.1 Integer-N Frequency Synthesizers 3.2.2 Case Study: Designing an Integer-N PLL Frequency Synthesizer 3.2.3 Fractional-N Frequency Synthesizers 3.3 Single-Loop and Multiloop Frequency Synthesizers 3.4 Noise in Frequency Synthesizers 3.4.1 Phase Jitter of the Reference Oscillator 3.4.2 Phase Jitter 6n,vco of the VCO 3.4.3 Reference Feadthrough Created by the Phase Detector Chapter 4. Higher-Order Loops 4.1 Motivation for Higher-Order Loops 4.2 Analyzing Stability of Higher-Order Loops 4.3 Designing Third-Order PLLe 4.3.1 Passive Laad-Lag Loop Filter 4.3.2 Active Leed-Lag Loop Filter 4.3.3 Active PI Loop Filter 4.4 Designing Fourth-Order PLLs 4.4.1 Active Lead-Lag Loop Filter 4.4.2 Active PI Loop Filter 4.5 Designing Fifth-Order PLLs 4.5.1 Active Lead-Lag Loop Filter 4.6.2 Active PI Loop Filter 4.6 The Key Parameters of Higher-Order PLLs 4.7 Loop Filters for Phase Detectors with Charge Pump Output 4.7.1 Loop Filters for Second-Order PLLs 4.7.2 Loop Filters for Third-Order PLLa 4.7.3 Loop Filters for Fourth-Order PLLs 4.7.4 Loop Filters for Fifth-Order PLLa Chapter 5. Computer-Aided Design and Simulation of Mixed-Signal PLLs 5.1 Overview 5.2 Quick Tour 5.2.1 Configuring the PLL System 5.2.2 Designing the Loop Filter 5.2.3 Analyzing Stability of the Loop 5.2.4 Getting the Loop Filter Schematic 5.2.5 Running Simulations 5.2.6 Getting Help 5.2.7 Shaping the Appearance of Graphic Objects 5.3 Case study: Design and Simulation of a Second-Order PLL 5.4 Suggestions for Other Case Studies 5.5 Displaying Waveforms of Tristate Signals Chapter 6. Ali-Digital PLLs (ADPLLs) 6.1 ADPLL Components 6.1.1 Ali-Digital Phase Detectors 6.1.2 Ali-Digital Loop Filters 6.1.3 Digital-Controlled Oscillators 6.2 Examples of Implemented ADPLLs 6.2.1 ADPLL Example 1 6.2.2 ADPLL Example 2 6.2.3 ADPLL Example 3 6.3 Theory of a Selected Type of ADPLL 6.3.1 Effects of Discrete-Time Operation 6.3.2 The Hold Range of the ADPLL 6.3.3 Frequency-Domain Analysis of the ADPLL 6.3.4 Ripple Reduction Techniques 6.3.5 Higher-Order ADPLLs 6.4 Typical ADPLL Applications 6.5 Designing an ADPLL 6.5.1 Case Study: Designing an ADPLL FSK Decoder Chapter 7. Computer-Aided Design and Simulation of ADPLLs 7.1 Setting up the Design Parameters 7.2 Simulating ADPLL Performance 7.3 Case Studies of ADPLL Behavior Chapter 8. The Software PLL (SPLL) 8.1 The Hardware-Software Tradeoff 8.2 Feasibility of an SPLL Design 8.3 SPLL Examples 8.3.1 An LPLL-like SPLL 8.3.2 A DPLL-like SPLL 8.3.3 A Note on ADPLL-like SPLLs Chapter 9. The PLL in Communications 9.1 Types of Communications 9.1.1 From Analog to Digital 9.2 Digital Communications by Bandpass Modulation 9.2.1 Amplitude Shift Keying 9.2.2 Phase Shift Keying 9.2.3 Quadrature Phase Shift Keying 9.2.4 QAM (m-ary Phase Shift Keying) 9.2.5 Frequency Shift Keying 9.3 The Role of Synchronization in Digital Communications 9.4 Digital Communications Using BPSK 9.4.1 Transmitter Considerations 9.4.2 Receiver Considerations 9.5 Digital Communications Using QPSK 9.5.1 Transmitter Considerations 9.5.2 Receiver Considerations 9.6 Digital Communications Using QAM 9.7 Digital Communications Using FSK 9.7.1 Simple FSK Decoders: Easy to Implement, but Not Effective 9.7.2 Coherent FSK Detection 9.7.3 Noncoherent FSK Detection and Quadrature FSK Decoders Chapter 10. State of the Art of Commercial PLL Integrated Circuits Chapter 11. Measuring PLL Parameters 11.1 Measurement of Center Frequency fo 11.2 Measurement of VCO Gain Ko 11.3 Measurement of Phase-Detector Gain Kd 11.4 Measurement of Hold Range and Pull-in Range Amp 11.5 Measurement of Natural Frequency Damping Factor, and Lock Range 11.6 Measurement of the Phase-Transfer Function H(w) and the 3-dB Bandwidth Appendix A. The Pull-in Process A.1 Simplified Model for the Pull-in Range Amp of the LPLL A.2 Simplified Model for the Pull-in Time Tp of the LPLL A.3 The Pull-in Range of the DPLL A.4 The Pull-in Time Tp of the DPLL Appendix B. The Laplace Transform B.1 Transforms Are the Engineer's Tools B.2 A Laplace Transform Is the Key to Success B.3 A Numerical Example of the Laplace Transform B.4 Some Basic Properties of the Laplace Transform B.4.1 Addition Theorem B.4.2 Multiplication by a Constant Factor k B.4.3 Multiplication of Signals B.4.4 Delay in the Time Domain B.4.5 Differentiation and Integration in the Time Domain B.4.6 The Initial- and Final-Value Theorems B.5 Using the Table of Laplace Transforms B.6 Applying the Laplace Transform to Electric Networks B.7 Closing the Gap between the Time Domain and the Complex-Frequency Domain B.8 Networks with Nonzero Stored Energy at t = 0 B.9 Analyzing Dynamic Performance by the Pole-Zero Plot B.10 A Simple Physical Interpretation of "Complex Frequency" Appendix C. Digital Filter Basics C.1 The Transfer Function ti(z) of Digital Filters C.2 IIR Filters C.2.1 The Impulee-lnvariant z Transform C.2.2 The Bilinear z Transform C.3 FIR Filters C.3.1 Window-FIR Filters C.3.2 Designing FIR filters with the Parks-McClellan Algorithm References Index
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